Poster "logical equivalence preservation" Papers

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Circuit Representation Learning with Masked Gate Modeling and Verilog-AIG Alignment

Haoyuan Wu, Haisheng Zheng, Yuan Pu et al.

ICLR 2025posterarXiv:2502.12732
6
citations

Circuit Transformer: A Transformer That Preserves Logical Equivalence

Xihan Li, Xing Li, Lei Chen et al.

ICLR 2025posterarXiv:2403.13838
7
citations