2025 Poster "electronic design automation" Papers

5 papers found

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Circuit Representation Learning with Masked Gate Modeling and Verilog-AIG Alignment

Haoyuan Wu, Haisheng Zheng, Yuan Pu et al.

ICLR 2025posterarXiv:2502.12732
6
citations

CORE: Collaborative Optimization with Reinforcement Learning and Evolutionary Algorithm for Floorplanning

Pengyi Li, Shixiong Kai, Jianye Hao et al.

NEURIPS 2025poster

Functional Matching of Logic Subgraphs: Beyond Structural Isomorphism

Ziyang Zheng, Kezhi Li, Zhengyuan Shi et al.

NEURIPS 2025posterarXiv:2505.21988

MIHC: Multi-View Interpretable Hypergraph Neural Networks with Information Bottleneck for Chip Congestion Prediction

Zeyue Zhang, Heng Ping, Peiyu Zhang et al.

NEURIPS 2025poster

QiMeng-CodeV-R1: Reasoning-Enhanced Verilog Generation

Yaoyu Zhu, Di Huang, Hanqi Lyu et al.

NEURIPS 2025posterarXiv:2505.24183
14
citations